Which of the following is used to transfer data between the processor CPU and memory

IDE and SCSI controllers can use any of three data transfer methods to move data to and from system memory. The first method, Programmed I/O (PIO), relies entirely on the host PC's CPU to conduct data back and forth between the controller and memory. Although PIO is cheap and easily implemented because it requires no special hardware, PIO-based disk I/O heavily taxes the host CPU and makes it unsuitable for multitasking environments such as Windows NT, UNIX, and NetWare. All implementations of the IDE/ATA specification can use PIO, whereas very few SCSI controllers (Adaptec is an exception) ever employ this method.

The other two methods of data transfer, which are more sophisticated than PIO, are known as third-party DMA and first-party DMA. Direct memory access (DMA) uses special hardware, either on the host system's motherboard or on a controller card, to facilitate the transfer of data to and from system memory without involving the CPU.

Third-party DMA is the less expensive, lower performance DMA method. In third-party DMA, the specialized hardware that transfers data is the DMA controller chip found on all PC motherboards. The DMA controller is called the third party because it transfers data between the first party, the drive controller, and the second party, the system's RAM. The various flavors of IDE/ATA support several third-party DMA transfer methods. Most SCSI adapters employ the DMA transfer method but use first-party DMA rather than third-party DMA.

First-party DMA, the faster DMA transfer method, is also known as Bus Mastering DMA. In Bus Mastering DMA, the DMA controller chip is built onto the drive controller and enables the controller to directly transfer data to and from system RAM without requiring intervention by the host system's CPU or third-party DMA controller. This technology transfers data much faster than either PIO or third-party DMA because Bus Mastering DMA requires about half as many bus cycles. Both PIO and third-party DMA require the CPU or DMA controller to alternate between reading a word of data from one device and writing to the other. Each word of data transferred requires two bus cycles: one for reading the data from the source and one for writing it to the target. Bus Mastering DMA, in contrast, requires bus cycles only when data is reading or writing to system RAM, thus halving the number of required bus cycles. In addition, the Bus Mastering device can access system RAM using high-speed methods such as page mode access. Bus Mastering DMA capabilities translate to significantly higher throughput and lower CPU utilization. Almost all SCSI controllers employ Bus Mastering DMA for data transfer, but only later-model IDE/ATA controllers (such as those found on the Triton chipset-based Pentium motherboards and all Pentium Pro motherboards) can use Bus Mastering DMA for data transfers.

DMA and Bus Mastering DMA aren't limited to drive controllers--other types of adapters, such as network interface cards, can also employ these methods to transfer their data to and from RAM. When you configure a system, avoid using a lot of Bus Mastering DMA peripherals, which can cause contention problems that result in system lockups, instability, or data loss. Your hardware vendor can tell you the maximum number of Bus Mastering devices your system can handle.

Here, we have listed the most important computer memory organization MCQ questions answers with the best possible necessary explanation.

These computer memory multiple-choice questions can be asked in various competitive examinations like RRB, SSC CGL, IBPS, CDS, and many more.

If you prepare answers to these questions, you can definitely answer the question asked in any competitive examination. So, let’s practice them.

MCQs based on Computer Memory Organisation


1. Which of the following is the smallest entity of memory?

(a) Block
(b) Cell
(c) Instance
(d) Set

Answer: (b), computer memory is divided into a large number of small parts called cells. Each cell (location) has a unique address, which varies from 0 to memory size – 1.


2. The primary memory (also called main memory) of a personal computer consists of

(a) RAM only
(b) ROM only
(c) both RAM and ROM
(d) Cache memory

Answer: (c)


3. The Boot sector files of the system are stored in which computer memory?

(a) RAM
(b) ROM
(c) Cache
(d) Register

Answer: (b), ROM stores the program instructions required to initially boot the computer. It only allows reading.


4. Which of the following statements are not correct about the main memory of a computer?

(a) In main memory, data gets lost when power is switched off.
(b) Main memory is faster than secondary memory but slower than registers.
(c) They are made up of semiconductors.
(d) All are correct

Answer: (d)


5. What is the full form of RAM?

(a) Read Access Memory
(b) Random Access Memory
(c) Readable Access Memory
(d) Random Accumulator Memory

Answer: (b)


6. What is the full form of ROM?

(a) Read-Only Memory
(b) Random Only Memory
(c) Register Only Memory
(d) Readable Only Memory

Answer: (a)


7. RAM is _ _ _ _ _ _ and _ _ _ _ _.

(a) volatile, temporary
(b) non-volatile, temporary
(c) volatile, permanent
(d) non-volatile, permanent

Answer: (a), RAM is volatile which means its data are lost when the device is powered off.


8. Which of the following memory is non-volatile?

(a) RAM
(b) ROM
(c) Cache
(d) ROM and Cache

Answer: (b), ROM chip is non-volatile, meaning its data is retained even when the device is powered off.


9. Which of the following is the lowest in the computer memory hierarchy?

(a) Cache
(b) RAM
(c) Secondary memory
(d) CPU registers

Answer: (c)


10. Which of the following has the fastest speed in the computer memory hierarchy?

(a) Cache
(b) Register in CPU
(c) Main memory
(d) Disk cache

Answer: (b)


11. Which memory acts as a buffer between CPU and main memory?

(a) RAM
(b) ROM
(c) Cache
(d) Storage

Answer: (c), Cache memory is a small, very high-speed semiconductor memory, which helps to speed up CPU. It is placed as a buffer between the CPU and RAM.


12. Which of the following statements are not correct about cache memory?

(a) Cache memory is used to store data temporarily.
(b) It holds that data and program which has to be executed within a short period of time.
(c) It consumes less access time as compared to the RAM.
(d) All are correct.

Answer: (d)


13. Which process is used to map logical addresses of variable length onto physical memory?

(a) Paging
(b) Overlays
(c) Segmentation
(d) Paging with segmentation

Answer: (c), Segmentation is a process or method in which memory is divided into groups of variable length called segments.


14. Which of the following is used to transfer data between the processor (CPU) and memory?

(a) Cache
(b) TLB
(c) Buffer
(d) Registers

Answer: (d), a processor (CPU) contains several registers to temporarily store data during the program’s execution.


15. Which computer memory chip allows simultaneous both read and write operations?

(a) ROM
(b) RAM
(c) PROM
(d) EEPROM

Answer: (b), RAM is a volatile chip memory that performs both read and write operations. That’s why, it is also called read-write memory (called RWM).


16. In which type of memory, once the program or data is written, it cannot be changed?

(a) EPROM
(b) PROM
(c) EEPROM
(d) None of these

Answer: (b), In Programmable Read-Only Memory (PROM), If there is an error in writing instructions or data, the error cannot be erased. PROM chip becomes unusable.


17. In which type of ROM, data can be erased by ultraviolet light and then reprogrammed by the user or manufacturer?

(a) PROM
(b) EPROM
(c) EEPROM
(d) Both a and b

Answer: (b), Erasable Programmable Read-Only Memory (EPROM).


18. Which type of ROM is used for erasing purposes only?

(a) PROM
(b) EPROM
(c) EEPROM
(d) Both b and c

Answer: (c), EEPROM stands for Electrically Erasable Programmable Read-Only Memory.


19. How many types of RAM are available?

(a) 4
(b) 3
(c) 2
(d) 5

Answer: (c), there are two types of Random Access Memory or RAM. They are SRAM (Static RAM) and DRAM (Dynamic RAM).


20. What is the size of the computer accumulator register?

(a) 4 bit
(b) 4KB
(c) 4 bytes
(d) 8 bytes

Answer: (c)

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